00001 // This file is part of MOS, the MANTIS Operating System 00002 // See http://mantis.cs.colorado.edu/ 00003 // 00004 // Copyright (c) 2002 - 2007 University of Colorado, Boulder 00005 // 00006 // All rights reserved. 00007 // 00008 // Redistribution and use in source and binary forms, with or without 00009 // modification, are permitted provided that the following conditions are 00010 // met: 00011 // 00012 // * Redistributions of source code must retain the above copyright 00013 // notice, this list of conditions and the following disclaimer. 00014 // * Redistributions in binary form must reproduce the above 00015 // copyright notice, this list of conditions and the following 00016 // disclaimer in the documentation and/or other materials provided 00017 // with the distribution. 00018 // * Neither the name of the MANTIS Project nor the names of its 00019 // contributors may be used to endorse or promote products derived 00020 // from this software without specific prior written permission. 00021 // 00022 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00023 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00024 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 00025 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 00026 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00027 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00028 // BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00029 // LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00030 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00031 // LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00032 // ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00033 // POSSIBILITY OF SUCH DAMAGE. 00034 00039 #ifndef _CC1000_PARAM_H_ 00040 #define _CC1000_PARAM_H_ 00041 00042 #include "com.h" 00043 #include "plat_dep.h" 00044 00046 #define MAIN_PARAM 0x11 00047 #define FREQ2A_PARAM 0x7C // 914.9988 Mhz 00048 #define FREQ1A_PARAM 0x20 00049 #define FREQ0A_PARAM 0x00 00050 #define FREQ2B_PARAM 0x5D 00051 #define FREQ1B_PARAM 0x0B 00052 #define FREQ0B_PARAM 0x43 00053 //from here to FS_DELAY_PARAM gets written sequentially 00054 00055 #define FSEP1_PARAM 0x03 00056 #define FSEP0_PARAM 0xE3 00057 00058 #define RX_CURRENT_PARAM 0x8C 00059 #define FRONT_END_PARAM 0x30 00060 #define PA_POW_PARAM 0xFF 00061 #define PLL_RX_PARAM 0x70 00062 #define LOCK_PARAM 0x10 00063 #define CAL_PARAM 0x26 00064 #define MODEM2_PARAM 0x90 00065 #define MODEM1_PARAM 0x6F 00066 00067 #define CC1000_BAUD_9600 00068 //force 9600 baud when using FEC 00069 #if defined (RADIO_USE_FEC) || defined (CC1000_BAUD_9600) 00070 #define MODEM0_PARAM 0x45 //9600 bps 00071 #else 00072 #define MODEM0_PARAM 0x55 //19.2kbps 00073 #endif 00074 00075 #define MATCH_PARAM 0x20 00076 #define FSCTRL_PARAM 0x01 00077 #define FSHAPE7_PARAM 0x00 00078 #define FSHAPE6_PARAM 0x00 00079 #define FSHAPE5_PARAM 0x00 00080 #define FSHAPE4_PARAM 0x00 00081 #define FSHAPE3_PARAM 0x00 00082 #define FSHAPE2_PARAM 0x00 00083 #define FSHAPE1_PARAM 0x00 00084 #define FSDELAY_PARAM 0x00 00085 #define PRESCALER_PARAM 0x00 00086 #define TEST6_PARAM 0x00 00087 #define TEST5_PARAM 0x00 00088 #define TEST4_PARAM 0x3F 00089 #define TEST3_PARAM 0x00 00090 #define TEST2_PARAM 0x00 00091 #define TEST1_PARAM 0x00 00092 #define TEST0_PARAM 0x00 00093 #define TX_CURRENT_PARAM 0xF3 00094 #define PLL_TX_PARAM 0x70 00095 00096 00097 uint8_t cc1000_params[FREQS_NUM][SETTING_NUM] ARCH_PROGMEM = 00098 { 00099 { // 902.265, 19.2 kBoudrate 0x00 00100 0xD6,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00101 0xD6,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00102 }, 00103 { // 902.791, 19.2 kBoudrate 0x01 00104 0xD6,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00105 0xD6,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00106 }, 00107 { // 903.318, 19.2 kBoudrate 0x02 00108 0xD6,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00109 0xD6,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00110 }, 00111 { // 903.845, 19.2 kBoudrate 0x03 00112 0xD6,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00113 0xD6,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00114 }, 00115 { // 904.371, 19.2 kBoudrate 0x04 00116 0xD6,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00117 0xD6,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00118 }, 00119 { // 904.898, 19.2 kBoudrate 0x05 00120 0xD6,0xa0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00121 0xD6,0xa7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00122 }, 00123 { // 905.43f, 19.2 kBoudrate 0x06 00124 0xD6,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00125 0xD6,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00126 }, 00127 { //#define FREQ_905_951_MHZ 0x07 00128 0xD6,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00129 0xD6,0xE7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00130 }, 00131 { //#define FREQ_906_478_MHZ 0x08 00132 0xD7,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00133 0xD7,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00134 }, 00135 { //#define FREQ_907_004_MHZ 0x0a 00136 0xD7,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00137 0xD7,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00138 }, 00139 { //#define FREQ_907_531_MHZ 0x0a 00140 0xD7,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00141 0xD7,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00142 }, 00143 { //#define FREQ_908_058_MHZ 0x0b 00144 0xD7,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00145 0xD7,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00146 }, 00147 { //#define FREQ_908_584_MHZ 0x0c 00148 0xD7,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00149 0xD7,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00150 }, 00151 { //#define FREQ_909_111_MHZ 0x0d 00152 0xD7,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00153 0xD7,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00154 }, 00155 { //#define FREQ_909_638_MHZ 0x0e 00156 0xD7,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00157 0xD7,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00158 }, 00159 { //#define FREQ_910_164_MHZ 0x0f 00160 0xD7,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00161 0xD7,0xE7,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06 00162 }, 00163 { //#define FREQ_910_691_MHZ 0x10 00164 0xD8,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00165 0xD8,0x07,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06 00166 }, 00167 { //#define FREQ_911_217_MHZ 0x11 00168 0xD8,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00169 0xD8,0x27,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06 00170 }, 00171 { //#define FREQ_911_744_MHZ 0x12 00172 0xD8,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00173 0xD8,0x47,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06 00174 }, 00175 { //#define FREQ_912_271_MHZ 0x13 00176 0xD8,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00177 0xD8,0x67,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06 00178 }, 00179 { //#define FREQ_912_797_MHZ 0x14 00180 0xD8,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00181 0xD8,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00182 }, 00183 { //#define FREQ_913_324_MHZ 0x15 00184 0xD8,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00185 0xD8,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00186 }, 00187 { //#define FREQ_913_851_MHZ 0x16 00188 0xD8,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00189 0xD8,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00190 }, 00191 { //#define FREQ_914_377_MHZ 0x17 00192 0xD8,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00193 0xD8,0xE7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00194 }, 00195 { //#define FREQ_914_907_MHZ 0x18 00196 0xD9,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00197 0xD9,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00198 }, 00199 { //#define FREQ_915_430_MHZ 0x19 00200 0xD9,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00201 0xD9,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00202 }, 00203 { //#define FREQ_915_957_MHZ 0x1a 00204 0xD9,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00205 0xD9,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00206 }, 00207 { //#define FREQ_916_484_MHZ 0x1b 00208 0xD9,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00209 0xD9,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00210 }, 00211 { //#define FREQ_917_010_MHZ 0x1c 00212 0xD9,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00213 0xD9,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00214 }, 00215 { //#define FREQ_917_537_MHZ 0x1d 00216 0xD9,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 00217 0xD9,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06 00218 } 00219 }; 00220 00221 #endif
1.4.6